1. Field of the Invention
This invention relates to a semiconductor integrated circuit, and more particularly to a custom integrated circuit composed of a combination of analog circuit cells designed to operate in the current mode.
2. Description of the Related Art
One known technique for realizing a custom integrated circuit is to form a plurality of analog circuit cells in the same semiconductor substrate and then combine these analog circuit cells into a system or a subsystem. FIG. 1 shows a conventional intermediate-frequency amplifier cell as an example of an analog circuit cell constituting a custom integrated circuit of this type. This cell, which operates from the voltages of the power supplies V.sub.CC and V.sub.EE applied across power supply terminals 1 and 2, is composed of a cascade connection of differential amplifiers DA-1, DA-2, and DA-3, and an emitter follower circuit EF. These differential amplifiers DA-1, DA-2, and DA-3, and an emitter follower circuit EF each operate receiving the bias voltage from the bias circuit BA. The differential amplifier DA-1 essentially consists of n-p-n transistors Q1 through Q4, Q15 through Q17, and resistors R1 through R4, with the input nodes (the bases of transistors Q1 and Q4) connected to the input terminals 3a and 3b, respectively. The differential amplifier DA-2 essentially consists of n-p-n transistors Q5 through Q8, Q18 through Q20, and resistors R5 through R8. The output nodes (the collectors of transistors Q3 and Q2) of the differential amplifier DA-1 are coupled through capacitors C1 and C2 with the input nodes (the bases of transistors Q5 and Q8) of the differential amplifier DA-2, respectively. The differential amplifier DA-3 essentially consists of n-p-n transistors Q9 through Q12, Q21 through Q23, and resistors R9 through R12. The output nodes (the collectors of transistors Q7 and Q6) of the differential amplifier DA-2 are coupled through capacitors C3 and C4 with the input nodes (the bases of transistors Q9 and Q12) of the differential amplifier DA-3, respectively. The emitter follower circuit EF is composed of n-p-n transistors Q13, Q14, Q24, and Q25. The output nodes (the collectors of transistors Q11 and Q10) of the differential amplifier DA-3 are connected to the bases of transistors Q13 and Q14, respectively. The emitters of the transistors Q13 and Q14 are connected to the output terminals 4a and 4b, respectively. The bias circuit BA, which is made up of n-p-n transistors Q26 and Q27, supplies to the base of each of transistors Q15 through Q25 a current corresponding to the bias voltage applied to the bias terminal 5.
The differential input signal supplied to the input terminals 3a and 3b are amplified at the differential amplifiers DA-1, DA-2, and DA-3 in that order. The output signals from the differential amplifier DA-3 are supplied at the output terminals 4a and 4b via the emitter follower circuit EF.
In the intermediate-frequency amplifier cell with such an arrangement, the input terminal 3a is biased by the power supply V.sub.CC via the resistor R1 and, the input terminal 3b via the resistor R4. For this reason, this cell must be basically capacitor-coupled with the preceding-stage circuit (not shown). The potential of the output terminal 4a is fixed at the potential equal to the power supply V.sub.CC minus the sum of the voltage drop (several hundred mV) across the resistor R11 and the base-emitter voltage V.sub.BE of the n-p-n transistor Q13, whereas the potential of the output terminal 4b is fixed at the potential equal to the power supply V.sub.CC minus the sum of the voltage drop (several hundred mV) across the resistor R10 and the base-emitter voltage V.sub.BE of the n-p-n transistor Q14. Therefore, it is necessary to set the input terminal potentials of the subsequentstage analog circuit cell (not shown) to be connected at the potentials of the output terminals 4a and 4b. It is also necessary to externally supply as much direct current as required to the bias terminal 5 needed to determine the bias voltage of the circuit.
As noted above, the input, output, bias circuits, and the like in conventional analog circuit cells are each based on unique design concepts, so that individual cells are different from each other in various conditions including voltage, current, and impedance required to provide the desired supply voltages and biases. For this reason, when a plurality of analog circuit cells are combined into a system or a subsystem to constitute a custom integrated circuit, the potentials of the input and output terminals are restricted to particular values and their alternating-current impedance matching is required, which makes the interface complex. To fulfill these complicated connecting conditions, detailed technical evaluations and partial circuit modifications are necessary, resulting in poor versatility.